Decomposition Approaches for Power Reduction

The article discusses a synthesis strategy aimed at reducing power consumption consumed by logic structures implemented in FPGAs. essence of the method is to carry out multioutput function decomposition, which takes into account problem dynamic reduction. presents several techniques leading such reduction: preliminary ordering variables taking probabilities occurrence value 1 for individual variables, reduction number LUTs limiting bound functions, and particular bicoding or appropriate unicoding need reduce implementation functions. These have been combined coherent called PowerdekBDD, an extension DekBDD strategy, result many years work area using BDD graphs. contains results experiments confirming effectiveness presented strategy.